1. Field of the Invention
The present invention relates to a test of a semiconductor device and a semiconductor wafer, and more particularly, to [burn-in].
2. Description of the Prior Art
FIG. 21 is a block diagram showing a prior art semiconductor device (referred to as "IC" hereinafter). An IC1 includes a VCC terminal 2, a GND terminal 3, input terminals 4, and output terminals 5. An input signal applied to the input terminal 4 is transmitted via input buffers 6 to a function block 7 and processed therein. The function block 7 applies output signals to the output terminals 5. For simplification, wiring connecting the VCC terminal 2 and the GND terminal 3 with the function block 7 is omitted.
FIG. 22 is a block diagram showing a prior art static burn-in board 9a. In case where the burn-in board 9a is utilized to perform burn-in, the IC1 is incorporated in the burn-in board 9a in a manner of a packaged IC8.
The burn-in board 9a includes a VCC terminal 10 and a GND terminal 11, and IC1 (IC8) has its VCC terminal 2 and GND terminal 3 connected to the VCC terminal 10 and the GND terminal 11 of the burn-in board 9a, respectively. On the other hand, the IC1 (IC8) has its input terminal 4 connected to either the VCC terminal 10 or the GND terminal 11, and its output terminal 5 put in its open state.
In performing burn-in, a potential difference is applied between the VCC terminal 10 and the GND terminal 11 to such an extent that it is higher than that in actual operation and that no element breakdown is caused. This allows stress to be applied to about a half of the whole elements, and in this way, a voltage acceleration test is practiced where early nonconforming articles are rejected in early stage. Simultaneously, a temperature acceleration test where ambient temperature is usually set high is practiced.
FIG. 23 is a block diagram showing a dynamic burn-in board 9b. Unlike the static burn-in board 9a, it additionally includes an a.c. signal terminal 13. Similar to the burn-in board 9a, the IC1 is incorporated in the burn-in board 9b in a manner of the packaged IC8. The IC1 (IC8) has its VCC terminal 2 and GND terminal 3 connected to the VCC terminal 10 and the GND terminal 11 of the burn-in board 9b, respectively, and its output terminal 5 put its open state.
Unlike the burn-in board 9a, part of the input terminal 4 of the IC1 (IC8) is connected not only to the VCC terminal 10 or the GND terminal 11 of the burn-in board 9b but also to the a.c. signal terminal 13. The a.c. signal terminal 13 is connected to an external waveform generator 12. In the dynamic burn-in, the waveform generator 12 is adapted to generate a waveform by which the function block 7 operates more efficiently and to apply the waveform to the part of the input terminal 4 so as to considerably enhance the number of elements to which stress is applied.
As so such a prior art semiconductor device, the number of input pins, an arrangement of them, and an arrangement of the VCC terminal and the GND terminal vary from one kind of packaged products to another. For example, even though they are apparently packaged in completely the same configuration, burn-in must be practiced by connecting a burn-in board to a packaged semiconductor device in different manners among those different kinds of products.
This is why burn-in boards packaged even in the same configuration cannot be standardized, and there is the disadvantage that each product requires a costly burn-in board and waveform generator.
In addition to that, conventional burn-in is practiced to packaged products, and there is the disadvantage that the burn-in cannot be practiced to a wafer having a plurality of chips. Although demand for chip delivery (delivering non-packaged chips to users) is raised to overcome such disadvantage, products in a state of "chips" are insufficient to secure reliability.